Shared media access protocols, such as EPON (specified in IEEE802.3ah) or GPON (specified in ITU-T G.984), describe systems comprised of an Optical Line Terminal (OLT) connected to several end devices called Optical Network Terminals (ONTs). An OLT controls the transmission time and transmission length of each ONT. The OLT uses a DBA algorithm in order to determine the transmission time and transmission length of each ONT.
A typical network is heavily oversubscribed, in a sense that more bandwidth (BW) is normally offered (“sold”) to ONTs than can be delivered. A powerful processing system is required for the quick and fair allocation of bandwidth. One solution is to base such a processing system on off-the-shelf processors (e.g. central processing units or CPUs). In the present invention, “CPU” is used to represent all types of known processors. However, such standard, non-dedicated CPUs have a large response time and the processing done thereby takes a long computation time, limiting the performance. In the past, an off-the-shelf CPU solution was sufficient for low-speed, shared-media applications, for example in cable modems. Off-the-shelf CPUs are designed to solve a general purpose problem and are designed for a specific task. Examples for the latter include math co-processors, which are used for accelerating math operations, security co-processors, which are used for accelerating math operations dedicated for security, or graphic processors which are used for managing graphic displays. With the rapid growth of bandwidth and in particular with the two orders of magnitude increase in uplink bandwidths, the required response time decreases by about two orders of magnitude. Unless processing is expedited, the overall system performance is compromised.
Another type of solution is based purely on hardware (HW), but this solution lacks the flexibility required for future-proofing the network. The continuous introduction of bandwidth-hungry applications changes the profile of network usage tremendously. A carrier that invests significant resources in a network demands the flexibility to adapt the network to real-life evolving traffic. HW solutions tend to support a single algorithm or a limited number of algorithms, since an algorithm must be simple enough for implementation. Consequently, possible changes in the algorithms are limited, and so is the flexibility to adapt the network to changes.
There is thus a widely recognized need for, and it would be highly advantageous to have, a device and system that provide both the flexibility of a CPU and the strength of dedicated HW acceleration in dynamic allocation of bandwidth.